De nition and Solution of the Memory Packing Problem for Field-Programmable Systems

This paper de nes a new optimization problem that arises in the use of a Field-Programmable System (FPS). An FPS consists of a set of FieldProgrammable Gate Arrays and memories, and is used both for emulation of ASICs and computation. In both cases the application circuits will include a set of memories which may not match the number and aspect ratio of the physical memories available on the FPS. This can often require that the physical memories be time-multiplexed to implement the required memories, in a circuit we call a memory organizer. We give a precise de nition of the packing optimization problem and present an algorithm for its solution. The algorithm has been implemented in a CAD tool that automatically produces a memory organizer circuit ready for synthesis by a commercial FPGA tool set.